1. Field of the Invention
The present invention relates to an interposer chip, a method of manufacturing the interposer chip, and a multi-chip package having the interposer chip. More particularly, the present invention relates to an interposer chip for electrically connecting together two semiconductor chips having different sizes, a method of manufacturing the interposer chip, and a multi-chip package having the interposer chip.
2. Description of the Related Art
Generally, various semiconductor fabricating processes can be performed on a wafer to form a plurality of semiconductor chips. In order to mount the semiconductor chips on a printed circuit board (PCB), a packaging process can be carried out on the wafer to form semiconductor packages.
In order to increase storage capacity of the packaged semiconductor device, a multi-chip package including sequentially stacked semiconductor chips can have been widely researched. The stacked semiconductor chips can be electrically connected with each other via conductive wires.
Here, when the semiconductor chips have different sizes, it can be difficult to directly connect the stacked semiconductor chips only using the conductive wires due to length limits of the conductive wires. In this case, an interposer chip can be interposed between the semiconductor chips. The semiconductor chips can be electrically connected with each other through the interposer chip.
A conventional interposer chip can include an insulating layer and a conductive layer pattern formed on the insulating layer. The semiconductor chips having different sizes can be electrically connected with each other via the conductive pattern.
However, the conventional interposer chip can be prone to becoming bent due to a weak strength of the insulating layer. When the interposer chip becomes bent, the conductive layer pattern can also be bent. As a result, connection of the conductive wires connected to the bent conductive layer pattern can become compromised. Consequently, an electrical connection between the conductive layer pattern and the conductive wire can have very low reliability.